apa menda nieh? hadoii.. meroyan aku seharian hari nie dok study vHDL. Mai tgk sket menatang apa VHDL nieh? Malas nak crita banyak2. tgk gambaq dulu la..
Levels of abstraction: Behavioral, Structural and Physical[1]
VHDL (VHSIC hardware description language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits.[2]
Although these languages look similar as conventional programming languages, there are some important differences. A hardware description language is inherently parallel, i.e. commands, which correspond to logic gates, are executed (computed) in parallel, as soon as a new input arrives. A HDL program mimics the behavior of a physical, usually digital, system. It also allows incorporation of timing specifications (gate delays) as well as to describe a system as an interconnection of different components.[1]
'sy budak baru blaja' so, baru la dok stdy overview n introduction. huhu.. tu pun jenuh nak paham. Antara yg di baca smpai telena td adalah mengenai Levels of representation and abstraction & Basic Structure of a VHDL file.
Reference:
[1] http://www.seas.upenn.edu
[2] http://en.wikipedia.org/wiki/VHDL
p/s: sape2 yg master dalam bahagian nie mari la kta share sama2 ilmu... aku pon baru nak blaja menda nie n memerlukan banyak lg pembacaan n pemahaman dalam bidang nie :)